- Wed May 22, 2024 8:40 am
#68426
I didn't watch all of it, there were far too many adverts. Its probably a good introduction to Kicad but he doesn't seem to care much about the layout. If I went in to a design review with that it would be rejected in seconds.
There are traces coming off pads in multiple directions which causes asymmetric solder joints which creates stresses in the component that can lead to cracking.
There are components with pads that are merged into traces and components with unequal trace sizes which leads to uneven cooling of the joint, also causing stress and also tombstoning on smaller components - he does mention this but then dismisses it and carries on.
There are thin traces coming off large pads without any teardrops or necking which can lead to crcking of the trace as a result of high stresses.
There is almost copper flood on the top layer which is a waste of etchant and makes copper balancing trickier, if the copper isn't balanced the board will warp during the solder process which, again, puts stress on components and joints.
Copper flood is usually connected to ground with multiple vias to reduce inductances between the component layer(s) he has routed each of the decoupling capacitors to ground through a single via, yet he keeps talking about low impedance connections. The micro is maybe 32MHz, so if the switching edges are at 10x the clock frequency then you're at 320MHz plus harmonics.
You used to be able to get away with poorly designed boards like this in the days of leaded solder if your application wasn't subject to much heat but these days components are smaller, solder temperatures are much higher and there are much stricter restrictions on EMI along with much higher frequencies.